Analog signals are continuous, digital signals are discrete. Analog devices produce, receive and transfer continuous signals, digital devices discrete signals. Current and voltage varies continuously in an R-C circuit. Human heartbeats are not continuous and can be modeled using digital bits.

Human body temperature varies continuously in 24 hours, but we can also sample it at discrete points in time to create a discrete signal.

Analog is better for some purposes, and digital for some other purposes. We routinely use analog-to-digital and digital-to-analog converters named ADC and DAC, respectively.

Digital signal can be computed upon, stored and transmitted more efficiently than the analog ones.

In digital electronics, circuits have only two states at a time: HIGH and LOW voltage where the high and low levels can be set to a specific voltage. HIGH (H) and LOW (L) might correspond to the TRUE (1) and FALSE (0) of Boolean logic. These are called logic levels.

Figure 10.1: A LOW-true or active-LOW signal called SWITCH CLOSED.

In the CMOS of HC family, voltage within 1.5 V of +5 V is HIGH, and voltage within 1.5 V of the ground level (0) is LOW.

Noise immunity: maximum noise level that can be tolerated without mixing up 1’s and 0’s. TTL had a noise immunity of 0.4 V.

How can a logic level represent numbers?

A decimal (base-10) number:

$$ 137.06 = 1 \times 10^2 + 3 \times 10^1 + 7 \times 10^0 + 0 \times 10^{-1} + 6 \times 10^{-2}. $$

Ten symbols are needed here, from 0 to 9.

In the binary system, only two symbols are used: 0 and 1.

Task: write down binary equivalents of the decimal digits.

A binary number can be easily converted to a decimal number as

$$ 1101_2 = 1\times 2^3 + 1\times 2^2 + 0\times 2^1 + 1\times 2^0 = 13_{10}. $$

The 1’s and 0’s are called binary digits or bits. The subscripts give the base. How to convert decimal to binary? By dividing the decimal number by 2 successively and recording the remainders.

So the binary of 13 is 1101, read from top to bottom, from the least significant bit (LSB) to the most significant bit (MSB).

Binary numbers can become very long, so we sometimes resort to the hexadecimal system which is base-16. The 16 symbols used are 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F.

$$ 707_{10} = 10\ 1100\ 0011_2 = 2C3_{16}. $$

Note that the binary number is divided into groups of 4 from the right. The first group $10$ can be converted to a groupd of 4 as well: $0010$. This way binary to hexa conversion becomes really easy because each hexa symbol has a unique 4-bit binary equivalent.

Hexadecimal numbers are important for systems that use bytes instead of bits. 1 byte = 8 bits which is just half of 16. In the byte-organization of computers, a computer-word can be 16, 32 or 64-bit long, that is 2, 4 or 8 bytes long. Each byte is represented by 2 hex digits; 64 bits need 8 bytes and hence 16 hex digits.

The memory locations in a microcontroller with 64K bytes can be identified with a 2-byte address (16 hex digits) because $2^{16}=65,536$.

Check out the ASCII charts here: https://www.unicode.org/charts/PDF/U0000.pdf

Use a 4-bit group for each digit:

$$ 137_{10} = 0001\ 0011\ 0111_{BCD} = 10001001_2. $$

Why do we like 10 digits? Because we have 10 fingers. Digit literally means finger. Things would be much easier if we were evolved with 8 or 16 digits, then BCD would not be needed. BCD is mostly used for I/O.

How to represent negative numbers in binary? There are three methods: sign-magnitude, offset binary and 2’s compliment. The last is the best.

In the ‘sign-magnitude representation’, the MSB is used for sign (0 for positive, 1 for negative), and the rest for the magnitude. It is awkward because calculation is very difficult.

The offset binary representation is created by subtracting the largest possible number from each.

2’s complement is the most efficient method. Here positive number is completely unsigned, the true binary number. To create the negative from the positive: complement each bit of the positive number (convert 0 to 1 and vice versa; 1’s complement), then add 1 to the 1’s complement to get the 2’s complement.

Observe the relation between offset binary and 2’s complement.

2’s complement is universally used for integer arithmetic in computers.

Addition is similar to adding two ordinary binary numbers bitwise with carry.

0 1 0 1    (+5)
1 1 1 0    (-2)
-----------------
0 0 1 1    (+3)

For subtraction, take the 2’s complement of the second number (+5) to turn it negative (-5) and then add to the first number (+2).

0 0 1 0    (+2)
1 0 1 1    (-5)
-----------------
1 1 0 1    (-3)

An $n$-bit integer can only represent $2^n$ numbers, so we can have overflow or underflow while adding or subtracting two numbers. Consider that the word is limited to 4 bits; you can add two 4-bit numbers and get an answer that requires 5 bits. How to solve this? Underflow is not a problem; just add a zero.

Overflow is a problem. To recognize overflow, note the carry flowing in and out of MSB. If the carry flowing in is equal to that flowing out, or vice versa, there is no overflow; otherwise there is an overflow.

0 1 1 1 1 1 0 1    (+125)
0 0 1 1 1 0 1 0    (+58)
----------------------------
1 0 1 1 0 1 1 1    (+183)

The decimal addition is correct, but the signed binary addition is wrong; a positive number cannot have the sign bit ‘1’. And also $0110111_2 \ne 183_{10}$ (Use this online converter to verify). The binary of $183$ requires 8 magnitude bits, but only 7 bits are available as the first bit is for sign.

An $n$-bit unsigned integer can represent the numbers from $0$ to $2^n-1$. An $n$-bit 2’s complement signed integer can take on values from $-2^{n-1}$ to $2^{n-1}-1$.

Try multiplication via two methods: direct addition & partial products.

Try division using the direct subtraction method.

Only one bit changes from one state to the next.

Check MyHDL: https://www.myhdl.org and https://pyvhdl-docs.readthedocs.io

Gate	Logic symbol	Boolean syntax	Verilog syntax	VHDL syntax	ABEL syntax
AND		$A\cdot B=Q$ $AB=Q$	$A\& B$	A and B	A & B
OR		$A+B=Q$	$A|B$	A or B	A # B
NOT		$\bar{A}=Q$	$\sim A$	not A	!A
NAND		$\overline{AB}=Q$
NOR		$\overline{A+B}=Q$
XOR		$A \oplus B = Q$	$A \land B$	A xor B	A $ B
XNOR		$\overline{A \oplus B}=Q$
Buffer		$A=Q$

Verilog, VHDL and ABEL are Hardware Description Languages (HDL) needed for Programmable Logic Devices (PLD).

Truth tables:

Propagation time $t_p$ for inverters of a few popular logic families.

Gate operations are not instantaneous.

AND gate can be created using diodes, npn transistors, MOS transistors and CMOS transistors. CMOS has superseded all previous elements.

CMOS NAND gate.

All gates are now part of ICs and are not created using discrete components.

Either car door is open and the driver is seated.

Active-LOW needed to save extra wiring.

One gate can be created from another. Here is how you create an NAD gate from a NAND gate: (EX)

Now try to figure out what the following circuits are doing:

NAND gates can be used to create all other gates. But a non-inverting gate cannot be used as a universal gate because an INVERT cannot be created from such a gate.

AND can be converted to OR and vice versa. To reduce confusion, use assertion-level logic notation for this purpose. Compare the following with the previous car-door example.

The AND has been converted to OR and vice versa.

It shows the life cycle of popular logic families that use bipolar transistors, CMOS and BiCMOS in the beginning of the 21st century.

SN74LVC08ADR: SN for the manufacturer ‘Texas Instruments’, 74 because it works in commercial temperature range from -40 to +125 degrees C, LVC is the family, 08 means it is a quad 2-input AND gate where quad means there are 4 AND gates in the same IC, and finally ADR gives other specifications.

Normally we can omit everything except the 08 and use ‘08 as the designator of the gate because it tells you all you need to know. If family matters, write ‘LVC08. See a list of standard logic gates in Table 10.3.

‘1G97 ‘configurable multiple-function gates’.

Now this gate can be used for 9 different functions: inverter, noninverting buffer, 2-input multiplexer; 2-input AND, OR, AND with one inverted input, OR with one inverted input, NAND with one inverted input, and NOR with one inverted input. EX: Try connecting the inputs in different ways to get these 9 functions.

Typical combinational tasks: addition, multiplication, comparison, parity check, conversion. The output depends only on the present input states. Can be created from gates alone.

Prove all the identities. The last two are called DeMorgan’s theorem or laws.

These Boolean identities can be written from truth tables as shown below using an XOR truth table.

Take the rows where output is 1, for each such row write A for 1 and $A'$ for 0, then add them:

$$ A \oplus B = A'B+AB'. $$

We have added them because output is 1 when $(A,B)=(0,1)$ OR $(1,0)$. This expression can be realized using the following circuit.

But there are other ways of creating XOR gate. For example,

$$ A \oplus B = AA'+AB'+BA'+BB' = A(A'+B')+B(A'+B') \\ = A(AB)'+B(AB)' = (A+B)(AB') $$

and this is realized below.

Draw circuit diagram from Boolean expression: https://javierramirezzayas.github.io/Logically